Optimizing QEMU a lil'...

Looking at the assembly output, there're a lot of redudant load/stores. How do you fix this in the code generator without breaking things left and right? Make a non-mandatory cache and have non-cache-aware instructions write the cache out.

Stay tuned for a patch that'll have the core caching code... and a couple of cached instructions.

edit: dang this is complex. ;) I think having a two stage emit phase might help... then you could do things like:

0x00f65b54: xor %ebx,%ebx
0x00f65b56: add %ecx,%ebx
to: mov %ecx, %ebx

0x00f65c98: mov %eax,%edx
0x00f65c9a: mov %edx,%ecx
0x00f65c9c: mov $0x44,%ebx
0x00f65ca1: mov %eax,0x2c(%ebp)
0x00f65ca4: mov %edx,0x0(%ebp)
to:
mov %eax, %ecx
mov $0x44, %ebx
mov %eax, 0x2c(%ebp)
mov %eax, 0x0(%ebp)

and finally:
0x00f66372: mov 0x0(%ebp),%eax
0x00f66375: mov 0x0(%ebp),%edx
0x00f66378: and %edx,%eax
to
0x00f66372: mov 0x0(%ebp),%eax

;)